Avoiding DC reference voltage shifts - amplitude regulator includes hold circuit comprising T network with capacitor and transverse switch

摘要

The amplitude regulator, for controlling the amplitude of an input pulse sequence wrt a given reference voltage avoids shifts in dc reference voltage with changes in regulator setting by incorporating a hold circuit (Rg) on the output side of the adjustment circuit (VP). The hold circuit consists of an T-network with series capacitor (C2) and a transverse switch (S2) connected to a reference voltage (Ub'). The sampling circuit (Ab) is coupled to the adjustment circuit's input. The adjustment circuit is controlled from a store (Sp) whose level is controlled by a control generator (Stw). A blocking switch (TS) can disconnect the control generator from the store, and the blocking switch is open and the hold circuit's switch closed during the intervals between pulses from the clock generator (G).