首页> 外国专利> Up and down counting circuit - responds to phase difference between two pulses for count forwards or backwards signal

Up and down counting circuit - responds to phase difference between two pulses for count forwards or backwards signal

机译:上下计数电路-对两个脉冲之间的相位差作出响应,以对正向或反向信号进行计数

摘要

The up/down counting circuit responds to the phase difference between two pulses from two pulse trains and accordingly produces either count forwards of count backwards signals. The circuit is cheap to make and is not affected by spurious pulses generated by the unavoidable chatter of any mechanical contacts that may be serving as pulse generator. - One pulse is applied to the set input of a first bistable flip flop (G1, G2) and the other to the set input of a second bistable flip flop (G3, G4). The reset inputs of both flipflops are connected to a pulse generator (K3, S3), which produces a pulse before or after each pair of input pulses. A logic circuit (G5, G6) indicates the states of both flipflops. Count direction signals are derived via a third flip flop (G9, G10) and further logic
机译:向上/向下计数电路响应来自两个脉冲序列的两个脉冲之间的相位差,并因此产生正向计数或反向计数信号。该电路制造成本低廉,不受任何可能用作脉冲发生器的机械触点不可避免的颤动所产生的虚假脉冲的影响。 -一个脉冲施加到第一双稳态触发器(G1,G2)的置位输入,另一个脉冲施加到第二双稳态触发器(G3,G4)的置位输入。两个触发器的复位输入都连接到脉冲发生器(K3,S3),该脉冲发生器在每对输入脉冲之前或之后产生一个脉冲。逻辑电路(G5,G6)指示两个触发器的状态。计数方向信号通过第三触发器(G9,G10)和其他逻辑得出

著录项

  • 公开/公告号DE000002012823C3

    专利类型

  • 公开/公告日1977-09-22

    原文格式PDF

  • 申请/专利权人

    申请/专利号DE2012823A

  • 发明设计人

    申请日1970-03-18

  • 分类号H03K21/00;

  • 国家 DE

  • 入库时间 2022-08-23 00:11:17

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