Pulse - - doppler radar device with a spectrum analyser for rapidly switched pulse repetition frequencies

摘要

1532242 Pulse doppler radar MARCONI CO Ltd 13 Oct 1975 [14 May 1975] 20244/75 Heading H4D Pulse doppler radar designed to overcome velocity ambiguities uses rapidly switching p.r.f.'s (e.g. 8KH 3 and 6À6KH 3 ) so that a target gives returns at both p.r.f.'s during one sweep, and a spectrum analyser as described in Specification 1,299,023 whereby the doppler shifted returns are converted into a corresponding number of pulses Fig. 2 having a Gaussian amplitude variation, a spacing corresponding to the particular p.r.f. and respective time positions, relative to the return giving rise thereto, corresponding to the doppler shift. Fig. 4(a) shows the analyser output pulses for two returns at 8KH 3 p.r.f. and four at 6À6KH 3 , for a doppler shift #d of 2KH 3 . No 'fold over' or velocity ambiguity arises. When the doppler shift is greater than the lowest p.r.f. e.g. 10KH 3 , 'fold over' occurs Fig. 4(c) and the analyser output pulses for the two p.r.f.'s are differently relatively positioned. The analyser output pulses are integrated by means of a commutated circuit Fig. 3 comprising two sets of, e.g. ten, integrating capacitors 34, 36 dealing with respective successive bands of doppler shifts e.g. 0À8KH 3 wide, the commutation switches 32, 38 being in sync with the p.r.f., and on the change from 8KH 3 to 6À6KH 3 the last two capacitors in the sets are bypassed. Thus indicating in Fig. 4 (b) the ten integration capacitor 34 as A-J the 2KH 3 output pulse is always stored in the third capacitor C, giving improved S/N. In the #d = 10KH 3 case Fig. 4(c) the output pulses for p.r.f. 8KH 3 would be stored in capacitor C, but those for 6À6KH 3 would be stored in capacitor E. To overcome this a second integrating circuit as shown in Fig. 3 is used, in parallel with the first for dealing with cases of #d = 6À6KH 3 #13KH 3 , and for the p.r.f. 6À6KH 3 the phase of the commutation is advanced two capacitors and capacitor G, H are bypassed. This gives, Fig.4 (d) capacitor C always storing the output pulses.