Stereo reception identification circuit for radio receivers - provides stereo indicator signal from left and right sum-and-difference components

摘要

The stereo identification circuit for radio receivers provides indication of reception of stereo or mono transmissions. Left and right a audio frequencies (L')(R') from the multiplex signal are fed to an adder circuit (I) comprising matching resistors (R1, R2, R3) and a phase-correcting capacitor (C1). The output is fed to a subtraction circuit (II) whose other input (EII 2) is supplied from the sum-signal channel (L+R) demodulator (III). The sum-signal is fed to the subtraction network via a capacitor (C3) to the base of a transistor (T1). The collector load (R3) is part of the adder circuit. The collector output signal is the difference signal D=1/k (L' + R') - (L + R). The signal is taken via a capacitor, resistor (R4) and diode (D1) to the output (AIIe as the identification signal to operate an indicator.