Radar receiver with circuit suppressing interfering signals - generates interference-free voltage by control circuit during interference suppression periods

摘要

The interference-free voltage is derived from the output of the moving target signal filter. A two-stage moving target signal filter (LZ G1, SS1; LZG2, SS2) is provided, the branched-off control circuit has a device (GR 2) for absolute value formation, and a low-pass filter (TP) which passes antenna modulation during sweep across the target. A differentiating device (DE) and a threshold circuit (MSW) blank out, when the unipolar threshold voltage (SW) is exceeded, the interfered signal and insert undisturbed signals from the threshold circuit (MSW) output signals. Threshold voltage (SW) has the same polarity as the first output pulse of the differentiating device (DE).