Dynamic MOS memory regeneration circuit - with regeneration effected in first part of each working cycle

摘要

The method is for the regeneration of the content of a MOS memory, in which working cycle of the memory is is divided into a first period in which only regenerative processes occur and a second period in which only reading or writing processes occur. A MOS memory to operate on this principle consists of a set of memory cells with a decoder connected to the word lines and with reading and writing amplifiers connected to the bit lines and a clock unit under the control of a central unit. After the clock unit (37) a divider (35) is connected. A cyclic counter (34) determines the cells to be regenerated, an address register (33) stores the working addresses, and between the address register and the decoder (31) a multiplexer is inserted (32). The cyclic counter may be a shirt register. The system is particularly suitable for small memories with relatively simple dynamic cells having a low retention time.