Polyphase MOSFET circuit for pulse duration variations - uses ring counters with decoders connected to RS flip flop controlled by digital signal applied to AND gates

摘要

The polyphase MOSFET circuit, for varying pulse duration in steps, has step width dependent on clock frequency and max. pulse duration determined by pulse frequency. Input signals are applied via two AND-gates (25, 26) to two ring counters (11, 12) with decoders (13, 14) at their outputs. The decoders are coupled to the inputs of an RS-flip flop (15) whose output forms the circuit's output. Two clock signals (F1, F2) are applied via two AND-gates (19, 20) and an OR-gate (21) to an AND-gate (22) lying between the flip flop's S-input and one decoder output. The digital control signal (17) that alters the pulse duration is applied via a divider (16) to all the AND-gates.