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NOR=gate with conventional two parallel transistor input - has series diode and resistor preventing input transistors saturating, to reduce switching time

机译:NOR =具有常规两个并联晶体管输入的门-具有串联二极管和电阻器,可防止输入晶体管饱和,以减少切换时间

摘要

The NOR-gate consists of a conventional arrangement of two parallel input transistors (T1, T2) with shared emitter and collector resistors, and an output transistor (T3) coupled by its base to the collectors of the input transistors and with its emitter forming the output (A). A diode (D) is connected in series with a resistor (R4) across the shared collector resistor (Rc) and ensures that the input transistors do not saturate. The series resistor (R4) is one tenth of the collector resistor. This diode and resistor increase the steepness of the signal's edges and reduce switching times correspondingly.
机译:或非门由两个并联的输入晶体管(T1,T2)和共用的发射极和集电极电阻组成,以及一个通过其基极耦合到输入晶体管的集电极并由其发射极构成的输出晶体管(T3)组成。输出(A)。二极管(D)与电阻(R4)串联连接在共享集电极电阻(Rc)两端,并确保输入晶体管不饱和。串联电阻(R4)是集电极电阻的十分之一。该二极管和电阻器增加了信号边缘的陡度,并相应地减少了切换时间。

著录项

  • 公开/公告号DE2634093A1

    专利类型

  • 公开/公告日1978-02-02

    原文格式PDF

  • 申请/专利权人 LICENTIA PATENT-VERWALTUNGS-GMBH;

    申请/专利号DE19762634093

  • 发明设计人 BRUECHMANNHANSJOERNDIPL.-PHYS.;

    申请日1976-07-29

  • 分类号H03K19/08;

  • 国家 DE

  • 入库时间 2022-08-22 22:01:25

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