Bit error rate measuring device - measures continuously or intermittently in digital signals transmitted over line for quality

摘要

A clock pulse train with correct phase is derived from a digital signal flow delivered by a receiver. It is used to determine in the decision instant area of a time interval of 2 delta t, where delta t is e.g. a 10% part of a bit width. Then amplitude changes occuring in the digital signal flow are counted during specified time intervals. A logic state is produced, depending on the count result. Counting is repeated so long as the rate of errors reaches a specified value. The logic state is changed after a count is made with a different rate of errors, and/or during a different time interval. A code combination is generated which can have one out of more than two states.