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First-order phase-lock loop

机译:一阶锁相环

摘要

A first order phase-lock loop that provides lower phase-error variance than classical systems at all frequencies when operated above threshold. The linear, minimum-variance filter described, in preferred form, employs three summers, two integrators, four system parameters, and two gain elements, the first and fourth system parameters being equal and the second and third system parameters being equal. The loop input, which contains a signal corrupted by noise, is connected as one input to the first summer whose output provides input to each of the gain elements. The first gain element is connected as one input to the second summer whose output is connected to the first integrator. The output of the first integrator, which is also the loop output and which is an estimate of the signal, is fed back negatively as one input to the first and second summers and as one negative input to the third summer. The first system parameter is connected in the feedback loop between the first integrator and the third summer, and the second system parameter is connected in the feedback loop between the first integrator and the second summer. The second integrator is connected to the output of the third summer; its output is fed through the third parameter negatively as a further input to the third summer and through the fourth system parameter as an input to the second summer. The second gain element is connected between the first and third summers. In certain circumstances the second gain element and/or the second and third system parameters (and their associated feedback loops) can be removed from the system.
机译:一阶锁相环在高于阈值的情况下在所有频率下均提供比传统系统更低的相位误差方差。所描述的线性,最小方差滤波器以优选形式使用三个求和器,两个积分器,四个系统参数和两个增益元件,第一和第四系统参数相等,第二和第三系统参数相等。环路输入包含一个被噪声破坏的信号,它作为一个输入连接到第一个求和器,该求和器的输出为每个增益元件提供输入。第一增益元件作为一个输入连接到第二求和器,第二求和器的输出连接到第一积分器。第一积分器的输出,也是环路输出,也是信号的估计,被负反馈为第一和第二求和器的一个输入,以及作为第三求和器的一个负的输入。第一系统参数连接在第一积分器和第三求和器之间的反馈回路中,第二系统参数连接在第一积分器和第二求和器之间的反馈回路中。第二个积分器连接到第三个求和器的输出;它的输出通过负的第三参数作为对第三求和器的进一步输入,并通过第四系统参数作为对第二个求和器的输入。第二增益元件连接在第一和第三求和器之间。在某些情况下,第二增益元件和/或第二和第三系统参数(及其相关的反馈回路)可以从系统中删除。

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