首页> 外国专利> Fabrication of semiconductor integrated circuit structure including injection logic configuration compatible with complementary bipolar transistors utilizing simultaneous formation of device regions

Fabrication of semiconductor integrated circuit structure including injection logic configuration compatible with complementary bipolar transistors utilizing simultaneous formation of device regions

机译:半导体集成电路结构的制造,包括利用同时形成器件区域与互补双极型晶体管兼容的注入逻辑配置

摘要

A version of integrated injection logic is disclosed in which both the switching transistor and the current source transistor are of the vertical type and in which the logic gates are fabricated in the same semiconductor integrated chip with linear circuits which are based on the complementary bipolar integrated circuit technology.PPThe injection logic gate is fabricated simultaneously with the linear integrated circuit using selected steps of the complementary bipolar technology. High voltage linear circuits and efficient logic circuits are achieved based on the use of a single moderate resistivity N-type epitaxial layer deposited on a high resistivity P-type substrate. In the logic circuit portion the epitaxial layer forms the collector zone of the current source transistor and the base zone of the switching transistor.
机译:公开了一种集成注入逻辑的版本,其中开关晶体管和电流源晶体管都是垂直型的,并且其中逻辑门在具有线性电路的同一半导体集成芯片中制造,该线性电路基于互补双极集成电路

使用互补双极技术的选定步骤,与线性集成电路同时制造注入逻辑门。基于使用沉积在高电阻率P型衬底上的单个中等电阻率N型外延层来实现高压线性电路和高效逻辑电路。在逻辑电路部分中,外延层形成电流源晶体管的集电极区和开关晶体管的基极区。

著录项

  • 公开/公告号US4087900A

    专利类型

  • 公开/公告日1978-05-09

    原文格式PDF

  • 申请/专利权人 BELL TELEPHONE LABORATORIES INCORPORATED;

    申请/专利号US19760733057

  • 发明设计人 ARISTIDES A. YIANNOULOS;

    申请日1976-10-18

  • 分类号H01L21/22;H01L21/20;

  • 国家 US

  • 入库时间 2022-08-22 21:30:07

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