Key debounce system for electronic calculator or microprocessor

摘要

A key debounce system for an electronic calculator or microprocessor system, wherein the calculator or microprocessor has a data memory for storing numeric data, an arithmetic unit for performing arithmetic operations on the data stored in the data memory, a program counter, an instruction memory for storing a plurality of instruction words controlling the operation of the microprocessor or calculator, one of the plurality of instruction words being outputted once each instruction cycle of the system according to an address stored in the program counter and a keyboard sensing circuit for interfacing the system with a keyboard. The key debounce system comprises a circuit for loading a starting instruction word address in the program counter, the starting instruction word address being generated according the the sensing of the depression of a key at the keyboard by the sensing circuit, the starting instruction word address being the first address of a set of instruction words controlling the system to perform the function indicated by the key depressed, and a disabling circuit for disabling the circuit loading the starting instruction word address after the sensing circuit has detected a key depression until an instruction word toward the end of the set of instruction words is outputted and no additional key depression is detected by the sensing circuit for a preselected period having a duration of a plurality of the aforementioned instruction cycles.