Testing system for TDMA communications network - uses random binary character series and has input and output shift registers

摘要

The transmission and reception circuits for the TDMA communications network each employ two buffer shift registers with a feedback loop, a monitoring circuit, a counter and a bistable multivibrator, with the outputs of the two registers in both the transmission and reception circuits combined by a modulo-2 addition. The registers for the transmission circuit are supplied with stock pulses from the same source via the circuit under test and the first register of the transmission and reception circuit provides a pulse series with a period equal to the length of one pulse frame, and the two further registers providing an elongated pulse series. A codeword is passed through the stages of each first register, with the monitoring circuit providing a start signal supplied to the respective counter. The start signal allows the transmission of a section of the elongated pulse series, ending when the counter reached a predetermined count.