Simultaneous multi subscriber PCM circuit - reduces computation time using sequential addition and subtraction operations at constant rate

摘要

A communications circuit uses PCM techniques allowing simultaneous use by more than two subscribers. The design is intended to minimise the computation required and the time involved in the various operations. The switching, carried out at a constant repetition rate, is to an input memory where the non-linear subscriber codes are fed in as groups. The codes are converted to a linear form in an expansion circuit. Computation is by an add and subtract circuit. Each memory group is read twice in succession, alternate subtraction and addition occurring during the two periods. Two registers are employed, one being inhibited during substraction and reset to zero at the start of the addition phase.