首页> 外国专利> Clock circuit for use in pulse-echo ultrasonic defect testing

Clock circuit for use in pulse-echo ultrasonic defect testing

机译:用于脉冲回波超声缺陷测试的时钟电路

摘要

A clock circuit comprising a synchronizable voltage controlled oscillator in combination with a programmable address means, which address means is adjusted commensurate with the acoustic velocity of the workpiece, provides clock pulses from the oscillator having a stable and accurate acoustic velocity dependent frequency. An entrant surface responsive electrical signal responsive to an ultrasonic search signal entering the workpiece is also provided to the clock circuit for assuring that the clock pulses are synchronized with the receipt of the electrical signal.
机译:包括可同步压控振荡器与可编程地址装置相结合的时钟电路,该地址装置根据工件的声速进行调整,它提供了来自振荡器的时钟脉冲,其具有稳定且精确的声速相关频率。还将响应于进入工件的超声搜索信号的进入表面响应电信号提供给时钟电路,以确保时钟脉冲与电信号的接收同步。

著录项

  • 公开/公告号US4134081A

    专利类型

  • 公开/公告日1979-01-09

    原文格式PDF

  • 申请/专利权人 KRAUTKRAMER-BRANSON INCORPORATED;

    申请/专利号US19770843451

  • 发明设计人 RICHARD J. PITTARO;

    申请日1977-10-19

  • 分类号H03B3/04;

  • 国家 US

  • 入库时间 2022-08-22 19:21:17

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号