Evaluation circuit for secondary radar reply signals - generates signal if more than one frame coincidence pulse appears within specified time tolerance range

摘要

The secondary radar reply signal evaluation circuit has a shift register with corresponding tappings for frame decoding and generation of a frame coincidence pulse, and a circuit for recognition of reply signals appearing consecutively in time and interfering with each other. Tests are made to find whether the two replies appear synchronously in the scanning pattern. In order to recognise reply signals arriving synchronously in the scanning pattern, the number of directly consecutive frame coincidence pulses is counted. If more than one frame coincidence pulse appears within a specified time tolerance range, i.e. a pseudo-frame coincidence pulse, a signal is generated signalling the presence of reply signals synchronous in the scanning pattern.