首页> 外国专利> Logic pulse train conversion to unity mark space ratio - using rc integrator and with output supplied to inverting and non-inverting inputs of amplifier comparator via low pass filter and directly

Logic pulse train conversion to unity mark space ratio - using rc integrator and with output supplied to inverting and non-inverting inputs of amplifier comparator via low pass filter and directly

机译:逻辑脉冲序列转换为单位标记空间比-使用rc积分器,并通过低通滤波器直接将输出提供给放大器比较器的反相和同相输入

摘要

Conversion of logic signal pulse trains having a wide range of mark-space ratios to a 1:1 ratio. The conversion circuit is esp. applicable to clock signals where accurate spacing of leading and trailing edge is important. The circuit is based on an RC integrator (3) providing a saw-tooth waveform from the incoming pulse train (1) which is fed to the non-inverting input of an operational amplifier (10) acting as a comparator and to a low pass filter (11). he filter supplies the amplifier inverting input with the sawtooth signal mean value. The integration constant of the RC network provides highly linear sawtooth rise and fall slopes, the DC component of its output being blocked by a capacitor from the RC junction.
机译:将具有宽范围的标记空间比率的逻辑信号脉冲序列转换为1:1比率。转换电路特别是。适用于时钟信号的上升沿和下降沿的精确间距很重要。该电路基于RC积分器(3),该RC积分器提供了来自输入脉冲序列(1)的锯齿波形,该波形被馈送到用作比较器的运算放大器(10)的同相输入和低通过滤器(11)。滤波器为放大器的反相输入提供锯齿波信号平均值。 RC网络的积分常数提供了高度线性的锯齿形上升和下降斜率,其输出的DC分量被来自RC结的电容器阻止。

著录项

  • 公开/公告号FR2438380A1

    专利类型

  • 公开/公告日1980-04-30

    原文格式PDF

  • 申请/专利权人 TELECOMMUNICAT RADIOELECT TELEPH;

    申请/专利号FR19780028620

  • 发明设计人 JEAN-LOUIS JEANDOT;

    申请日1978-10-06

  • 分类号H03K3/017;H03K5/04;

  • 国家 FR

  • 入库时间 2022-08-22 17:20:36

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