首页> 外国专利> CIRCUIT ARRANGEMENT FOR COMPENSATING THE PHASE DIFFERENCES BETWEEN THE DISTANCE CLOCK ON A PCM TIME MULTIPLEX LINE CONNECTING TO A PCM SWITCHING CENTER AND THE OFFICIAL STOCK OF THIS SWITCHING CENTER

CIRCUIT ARRANGEMENT FOR COMPENSATING THE PHASE DIFFERENCES BETWEEN THE DISTANCE CLOCK ON A PCM TIME MULTIPLEX LINE CONNECTING TO A PCM SWITCHING CENTER AND THE OFFICIAL STOCK OF THIS SWITCHING CENTER

机译:电路布置,用于补偿与PCM交换中心连接的PCM时间多路复用线路上的时钟和该交换中心的办公位置之间的相位差

摘要

A pulse coded time division multiplex (PCM) telecommunication system has two non-synchronous clock pulse trains for controlling information transfer and switching operations, respectively. In a circuit arrangement for compensating phase differences resulting from deviations between both clock pulse trains there is arranged an intermediate store for externally controlled buffering of PCM words for half of a pulse frame and connected thereto a buffer store for internally controlled buffering of PCM words for a full pulse frame. The intermediate store is designed for two modes of operation under control of the external clock pulse train. In an active mode during one cycle at first a stored PCM word is read out and is then replaced by a new PCM word. In the second mode the same PCM word first is temporarily buffered and immediately read out thereafter. Change of operation is controlled by a control unit monitoring addresses for alternate read operations and write operations of the buffer store of a minimum off-set of selected addresses to obtain by skipping of half of a pulse frame sufficient off-set without continuous uncontrolled slippage losses.
机译:脉冲编码时分多路复用(PCM)电信系统具有两个非同步时钟脉冲序列,分别用于控制信息传输和交换操作。在用于补偿由两个时钟脉冲串之间的偏差引起的相位差的电路装置中,布置了中间存储器,用于在脉冲帧的一半内对PCM字进行外部控制的缓冲,并且连接到中间存储器,用于对PCM字的内部控制缓冲。全脉冲帧。中间存储器设计为在外部时钟脉冲序列控制下的两种操作模式。在主动模式下,首先在一个周期内读取一个存储的PCM字,然后将其替换为新的PCM字。在第二种模式下,相同的PCM字先被临时缓冲,然后立即读出。操作的改变由控制单元控制,该控制单元监视地址的交替读取操作和写入操作的选定地址的最小偏移的缓冲存储器,以通过跳过一半脉冲帧获得足够的偏移,而不会产生连续的不受控制的滑移损耗。

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