Clock synchronisation system using received radio signal - has two comparator channels coupled to respective setting circuits for time-keeping adjustment

摘要

The system demodulates a received radio signal denoting the precise time and compares its phase with a signal (8), representing the actual time indication provided by the clock. The clock time-keeping adjustment is controlled by the result of this phase comparison. The phase comparator stage of the synchronisation system has two parallel channels (5,6) each receiving the demodulated radio signal (4) and respectively receiving the other signal (8) representing the clock indication directly and via an inverter (9). The synchronisation is effected via two setting circuits (11,12) each able to accelerate or slowdown the clock timekeeping adjustment and controlled by the outputs of the respective comparator channels (5,6).