Error detection system for pulse width modulated data transmission - uses clock pulses to determine permissible and non-permissible code receive periods

摘要

The error detection method uses a signal frame structure for scanning the incoming signal. According to the frame structure, the pulses in the signal are verified or detected as errors dependent upon whether the pulse leading trailing edge is within a permissible or not permissible time slot. The transmitted signal is in the form where a long pulse is high level and zero is low level. The first received pulse starts the receive equipment scanning clock for verification of the incoming bit stream. All received bits transitions must be in a low level time slot of the receive equip scanning clock. For example, when the clock starts two of the pulses are high and is non-permissible receive time slots, therefore the representation of a shortened first transmitted pulse is detected as an error. All correct length pulses and zeros have leading and trailing pulse edges which coincide with scanning clock zero.