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PHASE SYNCHRONIZING OSCILLATOR OF NETWORK SYNCHRONIZING DEVICE

机译:网络同步设备的相位同步振荡器

摘要

PURPOSE:To reduce the deviation of frequency in the free-running mode, by consecutively supplying the control voltage to a voltage control oscillator to compensate the deviation of frequency obtained immediately before starting the free-running and after the start of the free-running. CONSTITUTION:The clock supplied to an input terminal 21 from a main station and the output of a voltage control oscillator 3 are supplied to a phase comparator 1 to obtain an output having a pulse duration corresponding to the difference of phase between the clock and the output. This output is supplied to a low pass filter 2 that converts the value of the pulse duration into the value of the voltage as well as to a pulse duration enlarging circuit 11 that enlarges the pulse duration to the 200-fold value. The output of the circuit 11 is fed to a counter 12 to count the pulse duration, and the count value of the counter 12 obtained immediately before the interruption of the clock sent from the main station is maintained at a storage circuit 13. This count value is converted into the analog voltage value through a D/A converter 14. A selecting circuit 16 is controlled by the output of a free-running detecting circuit 15 and connects the converter 14 to the oscillator 3 when the clock given from the main station is interrupted and the free-running state is detected.
机译:目的:为了减小自由运行模式下的频率偏差,通过连续向电压控制振荡器提供控制电压,以补偿刚开始自由运行之前和开始自由运行之后获得的频率偏差。组成:从主站提供给输入端子21的时钟和压控振荡器3的输出被提供给相位比较器1,以获得具有脉冲宽度的输出,该脉冲持续时间与时钟和输出之间的相位差相对应。该输出被提供给低通滤波器2,该低通滤波器2将脉冲持续时间的值转换成电压的值,并且被提供给脉冲持续时间放大电路11,该电路将脉冲持续时间扩大到200倍。电路11的输出被馈送到计数器12以对脉冲持续时间进行计数,并且在从主站发送的时钟中断之前立即获得的计数器12的计数值被保持在存储电路13中。该计数值通过D / A转换器14将其转换成模拟电压值。选择电路16由自由运行检测电路15的输出控制,并且当从主站给出的时钟为0时,将转换器14连接到振荡器3。中断并检测到自由运行状态。

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