Monitoring circuit for data memory - executes telephone exchange routine to check lines of columns and sums of columns

摘要

This error check circuit for telephone exchange code memories comprises three elements: the first checks lines of a memory matrix, the second checks columns and the third compares sums of columns with a reference register. The first check circuit which comprises groups of AND-gates connected or OR-gates, checks lines of an x,y,z memory matrix. The second check circuit checks the columns of the x,y,z matrix and the third compares the column-sums of the x,y,z matrix with codes stored in a reference register in columns 1 to 4.