首页> 外国专利> Signal interruption system for micro-programme - inserts alternative address into micro-programme to change micro-instruction priority sequence

Signal interruption system for micro-programme - inserts alternative address into micro-programme to change micro-instruction priority sequence

机译:用于微程序的信号中断系统-在微程序中插入替代地址以更改微指令优先级顺序

摘要

A sequencing circuit (1) which normally delivers sequential instruction addresses may also transfer an address applied at a special input (D) directly to its output (7). Addresses output from the sequencer determine the microprogramme steps read from a programme memory (2) and held in a register (3). A four word memory in the sequencer holds subroutine return addresses. Interrupt signals (INTE, STOP,..) are allocated priority by an interrupt priority circuit (50) which transmits the appropriate interrupt address AD and an enabling signal MIC to a multiplexor (40) which transfers selection of the next instruction from the sequencer to the interrupt circuit. Each 124 bit micro-instruction contains 10 bits which are fed back at R to initialise the sequencer to the new programme location, thus initiating the interrupt service routine, and the sequencer now resumes control till the end of the service routine is detected.
机译:通常传递顺序指令地址的定序电路(1)也可以将在特殊输入(D)处施加的地址直接传输到其输出(7)。从定序器输出的地址确定从程序存储器(2)读取并保存在寄存器(3)中的微程序步骤。定序器中的四个字存储器用于保存子例程返回地址。中断优先级电路(50)向中断信号(INTE,STOP等)分配优先级,该中断优先级电路(50)将适当的中断地址AD和使能信号MIC发送给多路复用器(40),该多路复用器将下一指令的选择从定序器传送到中断电路。每个124位微指令包含10个位,这些位在R处反馈,以将定序器初始化到新的程序位置,从而启动中断服务程序,并且定序器现在恢复控制,直到检测到服务程序结束。

著录项

  • 公开/公告号FR2458844B3

    专利类型

  • 公开/公告日1982-05-14

    原文格式PDF

  • 申请/专利权人 LABO CENTRAL TELECOMMUNICATIONS;

    申请/专利号FR19790014746

  • 发明设计人

    申请日1979-06-08

  • 分类号G06F9/22;

  • 国家 FR

  • 入库时间 2022-08-22 12:30:22

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