Clock pulse plural cascade connected counters generate a plurality of patterns. Upon each clock pulse, the patterns in the plurality of counters are captured in a like plurality of registers. Each of the captured counts are then compared with one or more bit masks for determining identity. Detection of identity between any one of the plurality of masks with the selected ones of the registers results in the emission of a timing pulse. The initial counter states and the various mask values in the mask sets for the respective registers are program loaded. The apparatus can be computer monitored or can be programmed within a digital computer. Accordingly, the timing intervals are programmable by selecting diverse time-out lists.
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