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The control system of memory, memory module, apparatus of error of address, system memory and processes of deteccao errors of address and operation
The control system of memory, memory module, apparatus of error of address, system memory and processes of deteccao errors of address and operation
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机译:存储器的控制系统,存储器模块,地址错误的设备,系统存储器以及地址和操作的检测错误处理
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摘要
A memory system (11) for a computer detect data errors, address errors and operation errors to increase the reliability of data stored in the memory system. Address errors are detected by encoding address parity information into the data check field of each memory location. A signal is generated in each memory module (21) indicating the status of operations of that memory module and is transmitted to the processor subsystem (13, 15, 17 & 37) of the computer for comparison with a signal indicating the status of operations of the processor subsystem to ensure that all memory modules (21) and the memory control in the processor are receiving the same commands.
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