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The control system of memory, memory module, apparatus of error of address, system memory and processes of deteccao errors of address and operation

机译:存储器的控制系统,存储器模块,地址错误的设备,系统存储器以及地址和操作的检测错误处理

摘要

A memory system (11) for a computer detect data errors, address errors and operation errors to increase the reliability of data stored in the memory system. Address errors are detected by encoding address parity information into the data check field of each memory location. A signal is generated in each memory module (21) indicating the status of operations of that memory module and is transmitted to the processor subsystem (13, 15, 17 & 37) of the computer for comparison with a signal indicating the status of operations of the processor subsystem to ensure that all memory modules (21) and the memory control in the processor are receiving the same commands.
机译:用于计算机的存储系统(11)检测数据错误,地址错误和操作错误,以增加存储在该存储系统中的数据的可靠性。通过将地址奇偶校验信息编码到每个存储位置的数据检查字段中来检测地址错误。在每个存储器模块(21)中产生指示该存储器模块的操作状态的信号,并将该信号发送到计算机的处理器子系统(13、15、17和37),以与指示存储器模块的操作状态的信号进行比较。处理器子系统以确保所有内存模块(21)和处理器中的内存控件都接收相同的命令。

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