Complementary NPN and PNP lateral transistors separated from substrate by intersecting slots filled with substrate oxide for minimal interference therefrom and method for producing same

摘要

The invention is a pair of complementary transistors or arrays thereof and method for producing same in sub-micron dimensions on a silicon substrate selectively doped P and N type by forming intersectings slots (4, 5) in spaced apart relation across the P substrate regions to define semi-arrays of V shaped intermediate regions which will become transistors. Silicon oxide fills these slots and separates the NPN transistor regions from the substrate. Orthogonal slots (8, 9) divide the semi-arrays into individual transistor active regions; N doping is then introduced into each active region via the orthogonal slots and driven in to form the emitter and collector regions on respective sides of original substrate which forms the base regions. The same construction obtains in the N substrate regions to form the arrays of PNP transistors. Metallization patterns complete electrical connections to the emitter, base and collector regions and silicon oxide substantially covers the periphery of each active region for total isolation.