A FILTER CIRCUIT INCLUDING A SWITCHED-CAPACITOR FILTER

摘要

A filter circuit (16 min ) is disclosed, comprising a switched capacitor filter (21), and, at its input stage (40), a plurality of switched capacitors (41-1, 41-2, 41-3). The switched capacitors, connected in parallel with each other, receive the same successive input signals (VSin sec ). …??The filter circuit may form part of the receiver in a PCM communication system, wherein the decoder (17 min ) provides a series of PAM pulses (VSin sec ) with undesirable gaps inbetween In order to fill in the gaps in the signal, to provide the filter (21) with a 100% sample-and-hold signal (VS100), the said switched capacitors 41-1, 41-2, 41-3 store the input signal amplitude at a predetermined moment or moments during an input signal cycle, and discharge their stored amplitudes at regular intervals throughout the cycle.