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PHASE SYNCHRONIZATION CONTROLLING SYSTEM OF HIGH FREQUENCY RECTANGULAR SIGNAL

机译:高频矩形信号的相位同步控制系统

摘要

PURPOSE:To execute a phase synchronization control of a rectangular signal whose frequency is extremely high by executing a phase comparison by using a sampling circuit and a logical circuit, detecting a phase shift of leading and lagging, and generating a control signal of a phase adjusting circuit. CONSTITUTION:An input waveform A of a reference high frequency rectangular signal and an input waveform B of a high frequency signal to be controlled are supplied to a sampling circuit 14 and 15, respectively. The respective sampling waveforms A and B are sent to a phase detecting circuit 16. Also, in accordance with whether the sampling waveform B leads or lags A by its phase, a pulse of a phase shift period ''1'' is outputted from an AND circuit 19 or outputted from a circuit 20. These outputs are supplied to a phase counter 21, the counter 21 is brought to count-up when the high frequency rectangular signal to be controlled is in a leading phase, and brought to count-down when said signal is in a lagging phase. Their counting value is sent to a D/A converter 22, and converted to an analog signal. This signal is used for a phase synchronization control of a phase adjusting circuit.
机译:用途:通过使用采样电路和逻辑电路执行相位比较,检测超前和滞后的相移并生成相位调整的控制信号,以执行对频率极高的矩形信号的相位同步控制电路。组成:参考高频矩形信号的输入波形A和要控制的高频信号的输入波形B分别提供给采样电路14和15。各个采样波形A和B被发送到相位检测电路16。此外,根据采样波形B的相位是超前还是滞后A,从A相输出相移周期为“ 1”的脉冲。与电路19或从电路20输出。这些输出提供给相位计数器21,当要控制的高频矩形信号处于超前相位时,计数器21递增计数,并递减计数。当所述信号处于滞后阶段时。它们的计数值被发送到D / A转换器22,并且被转换为模拟信号。该信号用于相位调整电路的相位同步控制。

著录项

  • 公开/公告号JPS59119427A

    专利类型

  • 公开/公告日1984-07-10

    原文格式PDF

  • 申请/专利权人 FUJITSU KK;

    申请/专利号JP19820233956

  • 发明设计人 KURIBAYASHI NOBUHIKO;

    申请日1982-12-25

  • 分类号G06F1/04;

  • 国家 JP

  • 入库时间 2022-08-22 09:39:21

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