CORRECTION SYSTEM FOR DATA ERROR OF TRANSMISSION LINE USING SELF-SYNCHRONOUS SCRAMBLER AND DESCRAMBLER

摘要

PURPOSE:To correct accurately a data error, by detecting a bit error by an error check bit and inverting a bit where an increase of an error is forecasted. CONSTITUTION:An encoder COD generates and adds the check bit to input data bits and a scrambler circuit SCR performs scrambling to output the resulting data to a transmission line. The output of the descrambler circuit DSCR of a reception side is outputted and stored in a memory circuit 102 and an error is detected on the basis of the data bits and check bit outputted to an connected error detector and decoder 100. Detected information is outputted to a code inversion indicating circuit 101 and if some bit has an error, which bit in the data in the memory circuit 102 is to be rewritten is judged according to the condition of the descrambler circuit to correct the error on the basis of the judgement result.