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Master slice semiconductor chip having a new multi-function FET cell
Master slice semiconductor chip having a new multi-function FET cell
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机译:具有新型多功能FET单元的母片半导体芯片
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摘要
A cell layout provides a practical masterslice design for random logic in any LSI FET technology. Each cell is capable of the order of about 20 different functions at any of several different power levels. Multiple cells can be combined to form standard macro functions.
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