首页> 外国专利> CHARGE TRANSFER DEVICE INCORPORATING LAPLACIAN THRESHOLDING WITH A TIME DELAY AND INTEGRATION IMAGING ARRAY

CHARGE TRANSFER DEVICE INCORPORATING LAPLACIAN THRESHOLDING WITH A TIME DELAY AND INTEGRATION IMAGING ARRAY

机译:带时间延迟和积分成像阵列的拉普拉斯阈值控制的电荷转移设备

摘要

A charge transfer device incorporating Laplacian thresholding with an imaging array (1) operated in delay and integration mode to generate an array of charge packets corresponding to the light intensity at the picture elements of an irradiating image. The charge packets are gated in parallel to a line image storage array (7) that stores n rows of charge packets in a columnar relation. A replicator circuit (11) generates a replicated sum charge for each column of charge packets of the line image storage array. Each replicated sum charge corresponds to the sum of the n charges stored in a column (13) at a particular instant in time and the charge stored at the (n+ 1)/2 position of each column is the middle charge for the associated replicated sum charge. Parallel delay gating electrodes (15) gate a row of replicated sum charges to an area average serial shift register (17) at the same time that a row of corresponding middle charges is gated into a focused element serial shift register (9). The serial shift registers are gated synchronously in a serial fashion and, as the registers (9, 17) are gated, the endmost n replicated sum charges are summed by a horizontal summer (26) and 1/n2 of the sum is subtracted by a comparator (23) from an associated central charge stored in the focused element serial shift register (9). The difference is the Laplacian for the central charge. The output of the focused element serial shift register, the summer output, and the Laplacian uare useful for subsequent image processing.
机译:将拉普拉斯阈值与成像阵列(1)结合在一起的电荷转移装置,该成像阵列以延迟和积分模式运行,以生成与照射图像的像素处的光强度相对应的电荷包阵列。电荷包平行于门图像存储阵列(7)门控,该行图像存储阵列以列关系存储n行电荷包。复制器电路(11)为线图像存储阵列的电荷分组的每一列生成复制的总电荷。每个复制的总电荷对应于特定时间在列(13)中存储的n个电荷的总和,并且存储在每列(n + 1)/ 2位置的电荷是关联的复制和的中间电荷收费。平行延迟选通电极(15)在将一行相应的中间电荷选通到聚焦元件串行移位寄存器(9)的同时,将一行复制的总电荷选通到面积平均串行移位寄存器(17)。串行移位寄存器以串行方式同步门控,当寄存器(9、17)被门控时,最后的n个复制的总电荷由水平加法器(26)相加,并且总和的1 / n 2为由比较器(23)从存储在聚焦元件串行移位寄存器(9)中的相关联的中心电荷中减去。区别在于中心费用的拉普拉斯算子。聚焦元件串行移位寄存器的输出,求和器输出和Laplacian u用于后续图像处理。

著录项

  • 公开/公告号DE3068971D1

    专利类型

  • 公开/公告日1984-09-20

    原文格式PDF

  • 申请/专利权人 INTERNATIONAL BUSINESS MACHINES CORPORATION;

    申请/专利号DE19803068971T

  • 发明设计人 WHITE JAMES MERRILL;

    申请日1980-11-18

  • 分类号H04N5/30;H01L27/14;H04N5/14;

  • 国家 DE

  • 入库时间 2022-08-22 08:49:55

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