首页> 外国专利> NMOS integrated circuit capacitors using poly-silicon gates - uses auxiliary ion implant for capacitors and auto alignment diffusion for telephone analogue=to=digital converter

NMOS integrated circuit capacitors using poly-silicon gates - uses auxiliary ion implant for capacitors and auto alignment diffusion for telephone analogue=to=digital converter

机译:使用多晶硅栅极的NMOS集成电路电容器-使用辅助离子注入来制造电容器,并使用自动对准扩散来实现电话模拟到数字转换器

摘要

Thin oxide windows are formed on the P type substrate (10) and a boron ion implantation through a mask is used to form the enhancement morle transistors. A first phospharons or arsenic ion implant through a mask is performed in the areas for the depletion capacitors and transistors until the transistors are formed. A supplementary implant through a further mask in used to complete the doping for the capacitors. A polysilicon coating (19) is put over the gates (20) etched by selective removal of the oxide layer and then an auto alignment diffusion is used with the polysilicon as a mask to form the transistor sources and drains (21,22) and the connections to the capacitor plates (23). The substrate is coated by a thick oxide layer (24) and diverse connections (25) added. The capacitors are surrounded by an annular difusion and to prevent under cut errors they are laid out in groups of concentric elemental capacitors with the larger values on the outer rim. Successive capacitor elements in a matrix vary in value by a power of two.
机译:在P型衬底(10)上形成薄的氧化物窗口,并且通过掩模注入硼离子用于形成增强型莫尔晶体管。在用于耗尽电容器和晶体管的区域中执行通过掩模的第一磷光子或砷离子注入,直到形成晶体管为止。通过另一个掩膜的辅助注入用于完成电容器的掺杂。将多晶硅涂层(19)放在通过选择性去除氧化物层而蚀刻的栅极(20)上,然后将自动对准扩散与多晶硅一起用作掩模,以形成晶体管的源极和漏极(21,22)和与电容器极板(23)的连接。用厚的氧化物层(24)涂覆衬底,并添加各种连接(25)。电容器被环形扩散所包围,并且为了防止欠切误差,它们以同心单元电容器的组布置,在外边缘上具有较大的值。矩阵中的连续电容器元件的值以2的幂变化。

著录项

  • 公开/公告号FR2499766B1

    专利类型

  • 公开/公告日1984-02-17

    原文格式PDF

  • 申请/专利权人 TEXAS INSTRUMENTS FRANCE;

    申请/专利号FR19810002663

  • 发明设计人

    申请日1981-02-11

  • 分类号H01L21/72;H01L21/265;H01L27/04;H03K13/02;

  • 国家 FR

  • 入库时间 2022-08-22 08:45:42

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