Demodulation circuit for a signal modulated by frequency shifting.

摘要

The invention relates to the demodulation of a signal under modulation by frequency shifting, or FSK. A demodulation circuit according to the invention comprises in particular N counters 112-115 which measure the durations between successive passages through zero of the modulated signal, registers 201 and 202 which record the count values corresponding respectively to the present passage through zero and to the preceding passage through zero and a delay compensation circuit 203 which receives the output signals from the registers and which controls an output flip-flop 14 which supplies the demodulated signal. The delay compensation circuit delays the transitions of the demodulated output signal by an appropriate duration such that the interval which separates them corresponds exactly to the interval between the transitions in the original signal. Application to data transmission. IMAGE