COUNTER CIRCUIT FOR COUNTING HIGH FREQUENCY PULSES

摘要

A B S T R A C TCounter circuit for counting high frequency pulses.The counter circuit is adapted to counting highfrequency pulses and to being read while counting said pulses.It comprises a plurality of pulse counting stages of increasingnumerical significance, and read means for reading the statesof said stages. Said plurality of pulse counting stagescomprises lower significance stages (101 to 104) connectedas a synchronous counter (10) and higher significance stages(121 to 12n) connected as a ripple counter (12). Thesynchronous counter is so connected that it counts the highfrequency pulses (H) directly, and that any change of staterequired in any of its stages on counting a pulse occurssubstantially simultaneously with the arrival of said pulse.The ripple counter is so connected that it counts count cyclesof the synchronous counter, and that it takes a long timerelative to the interval separating two successive highfrequency pulses for a change of state to propagate, wherenecessary, from the least significant stage (121) of theripple counter to its most significant stage (12n). Earlycount signal means (244) are provided to apply a count signalto the ripple counter during each count cycle of thesynchronous counter at an instant which is early relative tothe synchronous counter cycling from its full count to itsempty count. Further, the read means (49) are provided withread timing means (244 & 57) for causing the state of theripple counter to be read regularly at a predeterminedsynchronous counter state.