PURPOSE:To perform space product sum arithmetic at a high speed by using a control circuit to obtain data delivered from the 2nd adder as the result of each space product sum arithmetic of the picture element data equivalent to a line and to be processed while the last line of a coefficient memory is controlled. CONSTITUTION:When an X counter is set at O when the processing is over, both F0 and F1 are set to a register 33. At the same time, the registers W3,1-W1,1 are set to registers 36-38 together with F1 and F1 set to a register 33 respectively. Then F0 and F1 are set to a register 34 with a shift clock SCLK1 for execution of the 1st arithmetic of the F0 and F2. The result of this arithmetic is obtained by an adder 47. Hereafter, the space product sum arithmetic is carried out for the picture element data on the 2nd and its follow ing lines respectively. A controller 19 switches multiplexers 29 and 39 to the side of a system address bus 52 with a stop command. Thus a main CPU 26 can have access to the 2nd frame memory 21 and reads the result of arithmetic out of the memory 21 via a data transmitter/receiver 25 to recognize it. In such a way, the picture data can be processed at a high speed.
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