Method for transforming switch level representation of a MOS circuit to a Boolean representation and method of simulating faults in a switch level representation of a MOS circuit by using its boolean representation

摘要

A method of simulating a differential cascade voltage switch circuit (domino circuit) by replacing each switch-level logic tree by a three-section Boolean tree. In each section, a switch is replaced by an AND gate (46, 48, 50, 52, 56, 58). The first and third section pass signals in one direction and the second section passes signals in the opposite directions. The three sections are interconnected end to end. Various faults can be simulated by holding selected internal signals (G02) at faulty values.