首页> 外国专利> synthesizer of frequency stage comprising two loops a phase locking the second of which multiplies the frequency of the first by a factor close to the unit.

synthesizer of frequency stage comprising two loops a phase locking the second of which multiplies the frequency of the first by a factor close to the unit.

机译:频率级合成器包括两个环路,两个环路锁相,第二个环路将第一个环路的频率乘以接近该单元的系数。

摘要

To frequency synthesis stage comprising two a phase locked loops. The first, d, m, cp, divides the frequency fod floors precedents by the end of the invention, n being an integer variable and added to the above a frequency standard p which is in a fixed ratio with a value representative of the large not to give an intermediate frequency f, while the second (o, m, m, cp, multiplied by nqr. P and q are chosen in such a manner such that the product p0 is substantially equal to the average of the limit values desired to the frequency of the output. / p & & p & application is the generation of frequencies tres castings.
机译:到包括两个锁相环的频率合成级。第一个,d,m,cp通过本发明的末尾划分频率fod floor的先例,n是一个整数变量,并以固定比例与上述频率标准p相加,该频率标准p代表较大的f给出一个中间频率f,而第二个(o,m,m,cp,乘以nqr.P和q)的选择方式应使乘积p0基本上等于该频率所需的极限值的平均值& p&& p&应用是频率铸件的产生。

著录项

  • 公开/公告号FR2565440B1

    专利类型

  • 公开/公告日1986-09-05

    原文格式PDF

  • 申请/专利权人 ADRET ELECTRONIQUE;

    申请/专利号FR19840008651

  • 发明设计人 JOEL REMY;

    申请日1984-06-01

  • 分类号H03L7/22;

  • 国家 FR

  • 入库时间 2022-08-22 07:31:18

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号