PURPOSE:To reduce electric power consumption and to fulfill miniaturization by putting two level detecting circuits into mutually complementary operation according to the saturated or unsaturated state of the amplifying circuit of FET by using a DC input voltage as a logical input. CONSTITUTION:When DC logical input A is 0, FETQB operates as an FET amplifier of a zero bias and output B' is generated. When no input arrives at FETQA, on the other hand, output B is 0. As logical input A changes into 1, an AC signal is amplified by FETQA and large AC output is generated by resistance RLA, so that output B may be 1. In this state, the DC voltage of the input of terminal A is applied to the gate of FETQB, which is saturated at a positive potential as compared with its source. Therefore, the saturation phenomenon of FETQB generates only an extremely small output across resistance RLB by the AC signal from terminal C and B' is 0.
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