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Driving circuit suppressing peak value of charging current from power supply to capacitive load

机译:驱动电路抑制从电源到电容性负载的充电电流的峰值

摘要

A buffer circuit, which supplies current to a capacitive load, has a first circuit for reducing the power supply charging current to the capacitive load during switching intervals. The first circuit includes a charge storage device precharged between inverter switching intervals to produce at least a portion of the load charging current during the switching intervals. A second circuit includes a switching element connected between the power supply and the capacitive load to electrically connect the power supply through the second circuit to the load at a selected time in the switching interval to supplement the charging current produced by the charge storage device.
机译:将电流提供给电容性负载的缓冲电路具有第一电路,该第一电路用于在切换间隔期间减小对电容性负载的电源充电电流。第一电路包括在逆变器切换间隔之间被预充电以在切换间隔期间产生负载充电电流的至少一部分的电荷存储装置。第二电路包括开关元件,该开关元件连接在电源和电容性负载之间,以在切换间隔中的选定时间将通过第二电路的电源电连接到负载,以补充由电荷存储装置产生的充电电流。

著录项

  • 公开/公告号US4628218A

    专利类型

  • 公开/公告日1986-12-09

    原文格式PDF

  • 申请/专利权人 NIPPON ELECTRIC CO. LTD.;

    申请/专利号US19830463420

  • 发明设计人 KAZUO NAKAIZUMI;

    申请日1983-02-03

  • 分类号H03K17/12;H03K17/04;H03K19/017;H03K17/13;

  • 国家 US

  • 入库时间 2022-08-22 07:09:55

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