HARDWARE STACK FOR LISP MACHINE IN PARALLEL GARBAGE COLLECTION

摘要

PURPOSE:To effectively perform the mark putting of a parallel garbage collection, and to easily constitute a multiprocessor, by using an address decoder circuit, a control circuit, a counter data latch circuit, and a delay circuit. CONSTITUTION:The hardware stack of a LISP machine is constituted of the address decoder circuit 1, the control circuit 2, a counter 3, the counter data latch circuit 4, and the delay circuit 5. Signals used in a hardware stack board are A01-A23, and R/the inverse of W, and the inverse of AS, as inputs, and SA01-SA23, and the inverse of SAS as outputs, and the SA01-SA23 are converted address signals. Also, the inverse of SAS in the signal in which the signal, the inverse of AS is delayed. Those signals are supplied to a memory instead of the A01-A23, and the inverse of AS. The hardware stack board functions only as an address converter, but, thereby, only the address line, the inverse of AS, is supplied from the board to the memory for the hardware stack, and other signals are supplied from a bus.