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Sequential-logic basic element in CMOS technology operating by a single clock signal

机译:CMOS技术中的顺序逻辑基本元素,通过单个时钟信号进行操作

摘要

The basic element provided by the invention carries out the basic logic functions of storage and/or transfer of the data applied at the input, typical of a latch. Two ways of embodiment of the basic element having active phase at the high and low level of the clock signal are described. The basic element presents a transfer-gate transistor at the input controlled by the clock signal, followed by an inverter at whose signal leads two positive feedback networks are connected, one of which controlled by the clock signal, to stabilize the logic levels (FIG. 1).
机译:本发明提供的基本元件执行存储和/或传输施加在输入上的数据的基本逻辑功能,典型地是锁存器。描述了在时钟信号的高电平和低电平具有有效相位的基本元件的两种实施方式。基本元件在由时钟信号控制的输入端提供了一个传输门晶体管,随后是一个反相器,该反相器的信号引线连接了两个正反馈网络,其中一个由时钟信号控制,以稳定逻辑电平(图2)。 1)。

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