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Method and apparatus for minimizing a memory table for use with nonlinear monotonic arithmetic functions

机译:最小化与非线性单调算术函数一起使用的存储表的方法和设备

摘要

A method which reduces the memory required to store correction factors used in logarithmic addition and subtraction of logarithmic operands. The method is implemented by a circuit which adds a predetermined correction factor to the minimum value of two logarithmic input operands. Correction factors are quantized to single polarity values. Predetermined ranges of magnitude values of the correction factors are selected in which the minimum value of each range is represented by a bias level. As a result of the bias levels, stored representations for the addition and subtraction factors are made much smaller resulting in less memory which is required. An addition of a predetermined bias level to the minimum value is effected simultaneous to addressing a predetermined adjustment factor in the reduced memory. A second addition is required to provide an output which represents either an addition or subtraction of the signed operands.
机译:一种减少存储用于对数操作数的对数加法和减法的校正因子所需的存储器的方法。该方法由电路实现,该电路将预定的校正因子添加到两个对数输入操作数的最小值。校正因子被量化为单极性值。选择校正因子的大小值的预定范围,其中每个范围的最小值由偏置水平表示。由于偏置水平,存储的用于加法和减法因子的表示要小得多,从而导致所需的内存更少。在减小的存储器中解决预定的调整因子的同时,将预定的偏置电平加到最小值。需要第二次加法来提供输出,该输出代表有符号操作数的加法或减法。

著录项

  • 公开/公告号US4737925A

    专利类型

  • 公开/公告日1988-04-12

    原文格式PDF

  • 申请/专利权人 MOTOROLA INC.;

    申请/专利号US19850805661

  • 发明设计人 TIM A. WILLIAMS;

    申请日1985-12-06

  • 分类号G06F7/556;G06F7/50;

  • 国家 US

  • 入库时间 2022-08-22 06:49:16

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