首页> 外国专利> Multiple redundant clock system comprising a number of mutually synchronizing clocks, and clock circuit for use in such a clock system

Multiple redundant clock system comprising a number of mutually synchronizing clocks, and clock circuit for use in such a clock system

机译:包括多个相互同步的时钟的多重冗余时钟系统,以及用于这种时钟系统的时钟电路

摘要

A multiple redundant clock system comprises at least n=4 clocks and is self-synchronizing and fault tolerant against the failure of at the most 1/2(n-1) clocks. Each clock comprises an oscillator circuit which activates a dividing circuit at the end of each period in order to form its own clock signal on the output of the dividing circuit. Each clock furthermore comprises a deviation-determining device which compares the own clock signal with the clock signals originating from the other clocks in the system. When an excessively large number of the other clock signals deviate during the first half of the (own) period, the own oscillator circuit is decelerated. When an excessively large number of the other clock signals deviate during the second half of the own period, the own oscillator circuit is accelerated.
机译:多冗余时钟系统至少包括n = 4个时钟,并且具有自同步功能,并且容错能力最大为1/2(n-1)个时钟。每个时钟包括一个振荡器电路,该振荡器电路在每个周期的末尾激活一个分频电路,以便在分频电路的输出端形成自己的时钟信号。每个时钟还包括偏差确定装置,该偏差确定装置将自己的时钟信号与源自系统中其他时钟的时钟信号进行比较。在(自己的)周期的前半部分中,如果其他时钟信号的数量过多时,自己的振荡器电路就会减速。当在自己周期的后半段中有过多其他时钟信号偏离时,自己的振荡器电路将加速。

著录项

  • 公开/公告号US4779008A

    专利类型

  • 公开/公告日1988-10-18

    原文格式PDF

  • 申请/专利权人 U.S. PHILIPS CORPORATION;

    申请/专利号US19870063542

  • 发明设计人 JOZEF L. W. KESSELS;

    申请日1987-06-17

  • 分类号H03K5/13;H01J19/82;

  • 国家 US

  • 入库时间 2022-08-22 06:48:29

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