SUB-RANGE ANALOG-DIGITAL CONVERTER WITH MULTPLEX INPUT AMPLIFIER SEPARATING CIRCUIT BETWEEN REDUCTION JUNCTION POINT AND LSB ENCODER

摘要

PURPOSE: To reduce the cost and complication of a remainder amplifier circuit part by evading the overdrive of the remainder amplifier of the analog/digital converter for a sub range of a high speed and high accuracy. CONSTITUTION: An MSB flash encoder 17 and an LSB flash encoder 48 respectively generate 7-bit output and it is latched to a digital error correction circuit 61. Least significant 7 bits and most significant 7 bits respectively generated by the LSB flash encoder 48 and the MSB flash encoder 11 are added together and a 12-bit output word for indicating input to this analog/digital converter 1 for the sub range is generated. Multiplexed differential input stages 351 and 352 prevent the overdrive of the remainder amplifier 43 and enable the direct feed-forward of an analog input voltage. Thus, inaccuracy relating to a feed- forward delay circuit is evaded and realization is easily performed on a monolithic circuit chip.