首页> 外国专利> process for the manufacture of integrated mosfeldeffekttransistorschaltungen in siliziumgate technology with silizid coated diffusionsgebieten as niederohmige traces.

process for the manufacture of integrated mosfeldeffekttransistorschaltungen in siliziumgate technology with silizid coated diffusionsgebieten as niederohmige traces.

机译:硅栅技术制造集成mosfeldeffekttransistorschaltungen的方法,其中硅化物涂层扩散gebieten作为niederohmige痕迹。

摘要

A method for the manufacture of integrated MOS-field effect transistor circuits in silicon gate technology and wherein diffusion source and drain zones are coated with a high melting point silicide as low-impedance printed conductors. The diffusion zones and polysilicon gates are made low-impedance through selective deposition of the metal silicide onto surfaces thereof. The selective deposition, which proceeds by use of a reaction gas eliminating hydrogen halide, simplifies the process sequence and is fully compatible with conventional silicon gate processes. Because of the high temperature stability, preferably tantalum silicide is employed. The invention is useful in the manufacture of MOS-circuits in VLSI-technology.
机译:一种用硅栅技术制造集成MOS场效应晶体管电路的方法,其中扩散源极和漏极区涂有高熔点硅化物作为低阻抗印刷导体。通过将金属硅化物选择性沉积到其表面上,可以使扩散区和多晶硅栅极的阻抗较低。通过使用反应气体消除卤化氢进行的选择性沉积简化了工艺流程,并且与常规的硅栅工艺完全兼容。由于高温稳定性,优选使用硅化钽。本发明可用于以VLSI技术制造MOS电路。

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