Central processor for industrial control computer - uses buffers between processor and system bus, which are sent to high impedance state if processor fault is detected

摘要

The computer includes a central processor unit (10) and a monitoring circuit (24) which emits a fault indication signal in the event of a malfunction of the processor. The central processor unit is connected to a system bus. The processor is connected to the bus through buffers (15, 19) and a storage unit (20), each having an inhibit input (15, 191, 201), controlled by the monitoring circuit (24) so as to cause them to present a high impedance output to the system bus in the event of a processor fault, thus isolating the faulty processor from the bus. ADVANTAGE - Provides increased security in industrial controllers incorporating reserve processor by isolating faulty processor from bus to prevent it interfering with operation of reverse processor.