首页> 外国专利> Single chip successive approximation analog-to-digital converter with trimmable and controllable digital-to-analog converter

Single chip successive approximation analog-to-digital converter with trimmable and controllable digital-to-analog converter

机译:具有可调整和可控制的数模转换器的单芯片逐次逼近模数转换器

摘要

A single chip monolithic integrated successive approximation analog-to- digital converter includes a test mode terminal for receiving shift register test mode control signals and successive approximation mode control signals. Digital test data signals are applied to a test data terminal. A trimmable digital-to-analog converter (DAC) is connected to receive digital signals and converts these signals to analog signals of corresponding values. A successive approximation and shift register is coupled to the test mode terminal and the test data terminal. During post- fabrication processing, the successive approximation and shift register operates in a shift register test mode in response to the test mode control signals. Test signals of a known value are serially received and applied in parallel to the DAC. The DAC can then be trimmed to required specifications. The successive approximation and shift register operates in a successive approximation mode in response to successive approximation mode control signals.
机译:单芯片单片集成逐次逼近模数转换器包括用于接收移位寄存器测试模式控制信号和逐次逼近模式控制信号的测试模式端子。数字测试数据信号被施加到测试数据端子。连接可调整的数模转换器(DAC)以接收数字信号,并将这些信号转换为具有相应值的模拟信号。逐次逼近和移位寄存器耦合到测试模式端子和测试数据端子。在后制造处理期间,响应于测试模式控制信号,逐次逼近和移位寄存器在移位寄存器测试模式下操作。已知值的测试信号被串行接收并并行施加到DAC。然后可以将DAC修整到所需规格。逐次逼近和移位寄存器响应于逐次逼近模式控制信号而以逐次逼近模式操作。

著录项

  • 公开/公告号US4851838A

    专利类型

  • 公开/公告日1989-07-25

    原文格式PDF

  • 申请/专利权人 VTC INCORPORATED;

    申请/专利号US19870134758

  • 发明设计人 JOHN S. SHIER;

    申请日1987-12-18

  • 分类号H03M1/38;

  • 国家 US

  • 入库时间 2022-08-22 06:27:42

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