PURPOSE:To obtain an envelope control circuit employing a binary digital logic circuit with the use of the complement of a binary floating point, by obtaining directly said complement with no intervention of an intermediate stage where the conversion is performed into a fixed point binary digit. CONSTITUTION:A mantissa counter 112 is provided with a mantissa counter of a modulo 8. An exponent counter 113 performs an adverse counting action with an underflow pulse received from the counter 112 and stores the component of a floating point number. Then the counter 112 starts an adverse counting action in response to a clock pulse received from a timing clock 114. When the music is produced, an ADSR control circuit 118 opens a gate 116 and the decimal point data received from a floating point complement circuit 50 is transferred to a high-speed multiplier 200. Thus the counter 113 performs an adverse counting action. When the counter 113 is set at 0, the circuit 118 starts a decay part of the ADSR curve calculation.
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