首页> 外国专利> array of memory blocks with lines of metal connection to source and drain are formed on the substrate and ortogonalmente outnumbered by connecting lines of gate and process for its fmanufacture

array of memory blocks with lines of metal connection to source and drain are formed on the substrate and ortogonalmente outnumbered by connecting lines of gate and process for its fmanufacture

机译:在衬底上形成具有与源极和漏极金属连接的线的存储块的阵列,并且通过连接栅极线及其制造方法数量超过原形件

摘要

机译:

著录项

  • 公开/公告号IT9083627D0

    专利类型

  • 公开/公告日1990-07-24

    原文格式PDF

  • 申请/专利权人 SGS - THOMSON MICROELECTRONICS SRL;

    申请/专利号IT19900083627

  • 发明设计人 CROTTI PIER LUIGI;

    申请日1990-07-24

  • 分类号H01L21/8247;H01L21/8246;H01L27/112;H01L27/115;H01L29/788;H01L29/792;

  • 国家 IT

  • 入库时间 2022-08-22 06:16:48

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