Process for reducing the variation of a cover sheet pattern structure as a result of reflection created by the optical lithography used in the production of an integrated circuit

摘要

To reduce reflection related feature size variations in a top layer (1), for example. B. from photoresist, in the integrated circuits Her position in a substrate (3), for example. Example, of silicon, is applied an antireflection layer (2) with the aid of optical lithography, the cover layer (1). One embodiment of the anti-reflection layer (2) consists entirely of a material, such. B. Si₃N₄ which has a refractive index which is greater than that of the outer layer (1), and has a thickness corresponding to a quarter of the wavelength of the light used for exposure. A further implementation form the antireflection layer (2) is of a first layer (21) of z. B. SiO _x N _y and a second layer (22) of z. B. SiO₂ composed, wherein the under the cover layer (1) facing first layer (21) has a larger refractive index than the outer layer (1) beneath the first layer (21) disposed second layer (22) has a smaller refractive index than the comprises first layer (21) and arranged below the second layer (22) substrate (3) having a larger refractive index than the substrate (3).